RTL/Logics Design Engineer
B.E/B.Tech, M.S/M.Tech with 2-10 years of experience. Expertise in micro-architecture, design of design blocks (IP) to system-on-chip (SoC) components.
Experience experience: "2-10 years "
ASIC Verification Engineer
BE/B.Tech, with 2-10 years of experience or MTech with 1+ Experience. Develop verification testbench components for chip/module level using System Verilog, C & Perl
Experience 2 years